Question# 01: Please answer these short questions. Answers should be in one
line (at NAME_1 it can be 2 lines). (20 Pts)
a. Why is Von Neumann Architecture best suited for general purpose microprocessors?
(1 Pt)

b. What kind of modifications are required to port a C-Code written for Intel
Microprocessor to AMD Microprocessor? (1 Pt)

c. Consider a microcontroller having Harvard architecture with 32-bit address bus and
32-bit data bus of Program Memory and 16-bit address bus as well as 16-bit data bus for
Data Memory. The registers are 32-bit wide and ALU operates on registers. What can we
say about the architecture (16-bit/32-bit) of the microcontroller?
(1 Pt)

d. What does a 16-bit Program NAME_2 tell us about the capacity of Program Memory of a
microcontroller?
(1 Pt)

e. Why does a microcontroller always execute a program at location 0x0000 of
ATMEGA16A? (1 Pt)

f. In the case of LDI R16, 0xFE instruction, which data memory location does the value
come from?
(1 Pt)

g. Consider a microcontroller operating on 1.0 MHz which fetches an instruction and then
executes it. How many instructions per second can be obtained from this microprocessor
in case of pipelining and without pipelining?
(1 Pt)

h. Consider the following code
(1 Pt)
.EQU ALPHA 14
LDI R17, ALPHA + 1
How many memory locations of Program Memory will be required to store this program?

i. Why are IN/OUT instructions preferred over LDS/STS in ATMEGA16A? (1 Pt)

j. Consider the following code
.ORG 0x0012
NAME_3: nop
nop
rjump NAME_3

Which address in data memory this instruction jumps to? (1 Pt)

l. In which scenarios, do we not have to initialize a Stack Pointer in an Assembly Code?
(1 Pt)

m. There is only 1 interrupt line associated with each peripheral such as Timer0, Timer1,
UART, ADC, SPI etc. Please comment. (1 Pt)

n. Assume we have configured an external interrupt with level triggering (high level) and all
registers are properly configured to service the interrupt in Atmega16A. The interrupt
line goes high, even then the Interrupt Service Routine (ISR) is not being called. What
could be the reason? (1 Pt)

o. We have enabled interrupts for all the peripherals including Timer0, ADC, UART and
SPI. What do you think which interrupt will be handled first?
Even after enabling individual interrupts, none of the ISRs get executed. What do you
think could be the reason?
(1 Pt)

p. In serial communication, how can you ensure whether data has been received at the
destination or not? If there is no mechanism then can you suggest one? (1 Pt)

q. We can detect an Your entire response should be in English, and in all capital letters.
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