Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
Ultra Low-Voltage Low-Power CMOS 4-2 and 5-2 Compressors for Fast Arithmetic Circuits
Adiabatic 4-2 compressors for low-power multiplier
A High-throughput Architecture for Lossless Decompression on FPGA Designed Using HLS (Abstract Only)
Design and Analysis of Approximate Compressors for Multiplication
FPGA-Based Lossless Data Compression using Huffman and LZ77 Algorithms
Multipliers With Approximate 4–2 Compressors and Error Recovery Modules
Lossless data compression techniques and their performance
Compressor trees for decimal partial product reduction
Design and Implementation of 8x8 Multiplier using 4-2 Compressor and 5-2 Compressor
Project space exploration on the 2-D DCT architecture of a JPEG compressor directed to FPGA implementation
VLSI Implementation of a Cost-Efficient Near-Lossless CFA Image Compressor for Wireless Capsule Endoscopy
An FPGA Logic Cell and Carry Chain Configurable as a 6:2 or 7:2 Compressor
A Cost and Power Efficient Image Compressor VLSI Design With Fuzzy Decision and Block Partition for Wireless Sensor Networks
A New Paradigm for Synthesis of Linear Decompressors
Adaptive on-the-fly compression
Approximate Multipliers Based on New Approximate Compressors
A Deep Neural Network Compression Pipeline: Pruning, Quantization, Huffman Encoding
Implementation of Lossless Image Compression Using FPGA
Two-level compression through selective reseeding
Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors
A Foreign Body in the Cervix after Spontaneous Abortion: A Rare Case of a Traumatic Fetal Decapitation
External Computations and Interoperability in the New DLV Grounder
Mathematical measures of syncopation
Performance analysis of low-power 1-bit CMOS full adder cells
Wireless Power Transfer Using Oscillating Magnets