Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: OpenPR: An Open-Source Partial-Reconfiguration Toolkit for Xilinx FPGAs
Invited Paper: Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs
Harnessing the power of FPGAs using altera's OpenCL compiler
Coarse and Fine Grain Programmable Overlay Architectures for FPGAs
Multipumping Flexible DSP Blocks for Resource Reduction on Xilinx FPGAs
OpenCL for FPGAs: Prototyping a Compiler
On the vulnerability of FPGA bitstream encryption against power analysis attacks: extracting keys from xilinx Virtex-II FPGAs
FPGASort: a high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting
Hardware Trojan Insertion by Direct Modification of FPGA Configuration Bitstream
An efficient FPGA overlay for portable custom instruction set extensions
Trusted design in FPGAs
Securing FPGA-based obsolete component replacement for legacy systems
LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems
VTR 7.0: Next Generation Architecture and CAD System for FPGAs
From opencl to high-performance hardware on FPGAS
High-Level Synthesis for FPGAs: From Prototyping to Deployment
The VTR project: architecture and CAD for FPGAs from verilog to routing
FlexGrip: A soft GPGPU for FPGAs
Automated synthesis for asynchronous FPGAs
System Generator : The State-of-art FPGA Design tool for DSP Applications
dfesnippets: An Open-Source Library for Dataflow Acceleration on FPGAs
Proximate, Nutrient and Mineral Composition of Cuttlefish (Sepia recurvirostra)
cross language pos taggers ( and other tools ) for indian languages : an experiment with kannada using .
The Stratix II logic and routing architecture
Navigating in the new competitive landscape: Building strategic flexibility and competitive advantage in the 21st century.
Detecting Inconsistencies Between Process Models and Textual Descriptions