Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper
Query: A hybrid memristor-CMOS multiplier design based on memristive universal logic gates
MRL — Memristor Ratioed Logic
Design and simulation of logic circuits with hybrid architectures of single-electron transistors and conventional MOS devices at room temperature
Compact, low-voltage, low-power and high-bandwidth CMOS four-quadrant analog multiplier
A CMOS Four-Quadrant Analog Multiplier
Memristor Networks
Memristor based computation-in-memory architecture for data-intensive applications
Memristive switching mechanism for metal/oxide/metal nanodevices
A Low Power Array Multiplier Design using Modified Gate Diffusion Input ( GDI )
The missing memristor found
Cellular nanoscale network cell with memristors for local implication logic and synapses
Design of area efficient and low power multipliers using multiplexer based full adder
A review on various multipliers designs in VLSI
Integration of nanoscale memristor synapses in neuromorphic computing architectures
A 1.8V CMOS chopper four-quadrant analog multiplier
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
Integrated circuit with memristor emulator array and neuron circuits for neuromorphic pattern recognition
A CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing
Design of 4-Bit Universal Shift Register Using Reversible Gates
Low power CMOS NAND gate using DVS and mutithreshold CMOS technique
SPICE Model of Memristor with Nonlinear Dopant Drift
Feature Factorization for Top-N Recommendation: From Item Rating to Features Relevance
Postural control in children, teenagers and adults with Down syndrome.
Development and validation of a learning analytics framework: Two case studies using support vector machines
Memristor-based IMPLY logic design procedure
Combined EEG-Gyroscope-tDCS Brain Machine Interface System for Early Management of Driver Drowsiness