Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper.
Query: an optimum algorithm for data compression using vhdl .
A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm
An FPGA Logic Cell and Carry Chain Configurable as a 6:2 or 7:2 Compressor
Efficient architecture of variable size HEVC 2D-DCT for FPGA platforms
Implementing the PPM Data Compression Scheme
Synthesis and Implementation of UART Using VHDL Codes
A Cost and Power Efficient Image Compressor VLSI Design With Fuzzy Decision and Block Partition for Wireless Sensor Networks
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
Best Practices for Compact Modeling in Verilog-A
VHDL Implementation of 32-Bit Microprocessor
VHDL Implementation of 32-Bit Arithmetic Logic Unit (Alu)
Base-delta-immediate compression: practical data compression for on-chip caches
Efficient VLSI Architectures for Error-Correcting Coding
On the Usefulness of Fibonacci Compression Codes
VHDL Implementation of Non Restoring DivisionAlgorithm Using High Speed Adder/Subtractor
Low power 3–2 and 4–2 adder compressors implemented using ASTRAN
Using Fibonacci Compression Codes as Alternatives to Dense Codes
A lossless compression algorithm for vibration data of space systems
A VLSI High-Performance Encoder with Priority Lookahead
Frequent Pattern Compression: A Significance-Based Compression Scheme for L2 Caches
VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation
Streptococcus milleri causing treatable infection in perineal hidradenitis suppurativa
Data Integration: The Current Status and the Way Forward
Regular-expression derivatives reexamined
FPGA-Based Lossless Data Compression using Huffman and LZ77 Algorithms
Disease Trajectory Maps