Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
Yield and speed optimization of a latch-type voltage sense amplifier
Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input
Low Power CMOS Dynamic Latch Comparator using 0.18?m Technology
Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterization
Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications
High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM
High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection
An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory
A novel high-speed sense-amplifier-based flip-flop
CMOS switched-op-amp-based sample-and-hold circuit
A 1.2V 246uW CMOS latched comparator with neutralization technique for reducing Kickback Noise
Compact low-voltage power-efficient operational amplifier cells for VLSI
An Analysis of Latch Comparator Offset Due to Load Capacitor Mismatch
A Dual-Loop Delay-Locked Loop Using Multiple Voltage-Controlled Delay Lines
A low-offset high-speed double-tail dual-rail dynamic latched comparator
A NOVEL CMOS DYNAMIC LATCH COMPARATOR FOR LOW POWER AND HIGH SPEED
A Low-Kickback-NoiseLatched Comparator for High-SpeedFlashAnalog-to-Digita l Converters
A fast-transient digital LDO using a double edge-triggered comparator with a completion signal
A dynamic analysis of a latched CMOS comparator
Low voltage adjustable CMOS Schmitt trigger
TopoTiles: Storytelling in Care Homes with Topographic Tangibles
Mobile phone addiction: a point of issue.
Mechanisms of action in youth psychotherapy
Serial murder in America: case studies of seven offenders
Static-noise margin analysis of MOS SRAM cells