Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper.
Query: Temperature-aware microarchitecture
Dynamic thermal management for high-performance microprocessors
An Artificial Neural Networks based Temperature Prediction Framework for Network-on-Chip based Multicore Platform
POWER4 system microarchitecture
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness
SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Carbon: architectural support for fine-grained parallelism on chip multiprocessors
Automatic Intra-Register Vectorization for the Intel® Architecture
Computer Architecture Techniques for Power-Efficiency
Bahurupi: A polymorphic heterogeneous multi-core architecture
Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking
A retargetable framework for instruction-set architecture simulation
Cache-aware Roofline model: Upgrading the loft
Compact thermal modeling for temperature-aware design
The Intel Pentium M Processor: Microarchitecture and Performance
Branch prediction, instruction-window size, and cache size: Performance tradeoffs and simulation techniques
Analyzing soft-error vulnerability on GPGPU microarchitecture
Compiler-Directed Dynamic Voltage and Frequency Scaling for CPU Power and Energy Reduction
Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon
Machine Learning-Based Temperature Prediction for Runtime Thermal Management Across System Components
Towards contextually sensitive urban densification: Location-based softGIS knowledge revealing perceived residential environmental quality
Novel Single-Phase PWM AC–AC Converters Solving Commutation Problem Using Switching Cell Structure and Coupled Inductor
Security attack analysis using attack patterns
Embodied cognition and linguistic comprehension.
Branch prediction, instruction-window size, and cache size: Performance tradeoffs and simulation techniques