Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: SoCIN: a parametric and scalable network-on-chip
A network on chip architecture and design methodology
Exploring Fault-Tolerant Network-on-Chip Architectures
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation
Analyzing on-chip communication in a MPSoC environment
Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations
Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors
APPROX-NoC: A Data Approximation Framework for Network-On-Chip Architectures
SMART: A single-cycle reconfigurable NoC for SoC applications
FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow
Methods for fault tolerance in networks-on-chip
A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks
A Layer-Multiplexed 3D On-Chip Network Architecture
Power-aware communication optimization for networks-on-chips with voltage scalable links
Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures
DLibOS: Performance and Protection with a Network-on-Chip
BIST for network-on-chip interconnect infrastructures
darkNoC: Designing energy-efficient network-on-chip with multi-Vt cells for dark silicon
A case for bufferless routing in on-chip networks
Noxim: An open, extensible and cycle-accurate network on chip simulator
Route packets, not wires: on-chip interconnection networks
deepViz : Visualizing Convolutional Neural Networks for Image Classification
Evaluation by Citation: Trends in Publication Behavior, Evaluation Criteria, and the Strive for High Impact Publications
Design and Analysis of a Full-Bridge LLC-Based PEV Charger Optimized for Wide Battery Voltage Range
Semantic Edge Detection with Diverse Deep Supervision