Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper.
Query: Designing and simulation of full adder cell using FINFET technique
Novel low power full adder cells in 180nm CMOS technology
A novel power efficient N-MOS based 1-bit full adder
Design of 16T full adder circuit using 6TXNOR gates
Analysis and Performance Evaluation of 1-bit Full Adder Using Different Topologies
Study of Design and Analysis of Low-Power 10-Transistor Full Adders Using Novel XOR–XNOR Gates
Low-Power and Fast Full Adder by Exploring New XOR and XNOR Gates
Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology
Comparative Analysis of Different Types of Full Adder Circuits
A New design of 1-bit full adder based on XOR-XNOR gate
Power and Delay Comparison in betweenDifferent types of Full Adder Circuits
Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
A Novel High-speed Adder-Subtractor Design based on CNFET
CMOS Full-Adders for Energy-Efficient Arithmetic Applications
A Six Transistors Full Adder
cmos full adders for energy efficient fir filters .
A novel multiplexer-based low-power full adder
new design methodologies for high - speed mixed - mode cmos full adder circuits .
High Performance and Low Power 8 bit 16T full adder using MTCMOS Technique
Analysis and optimization of Active Power and Delay of 10T Full Adder using Power Gating Technique at 45 nm Technology
Low Power FinFET based 10T SRAM cell
An efficient implementation of D-Flip-Flop using the GDI technique
Do Personal Ethics Influence Corporate Ethics
The Verilog® Hardware Description Language
Human Performance on Insight Problem Solving: A Review
Self-organizing neural integration of pose-motion features for human action recognition