Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: Ultra low-power high-speed single-bit hybrid full adder circuit
A novel low-power full-adder cell for low voltage
DESIGN AND COMPARISON OF LOW POWER & HIGH SPEED 4-BIT ALU
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels
CMOS Full-Adders for Energy-Efficient Arithmetic Applications
Comparative Analysis of Different Types of Full Adder Circuits
A new low-power, low-area, parallel prefix Sklansky adder with reduced inter-stage connections complexity
Carry speculative adder with variable latency for low power VLSI
A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
Performance analysis of 1 bit full adder using GDI logic
A Novel High-speed Adder-Subtractor Design based on CNFET
Full Adder Circuits using Static Cmos Logic Style: A Review
Low power 4×4 bit multiplier design using dadda algorithm and optimized full adder
High-Performance Low-Power Carry Speculative Addition With Variable Latency
Optimized CMOS Design of Full Adder using 45nm Technology
Design of Full Adder Circuit Using Double Gate MOSFET
Design a Low Power Half-Subtractor Using .90µm CMOS Technology
Designing and simulation of full adder cell using FINFET technique
A simple yet efficient accuracy configurable adder design
low - voltage low - power cmos full adder - circuits , devices and systems , iee proceedings - .
A Six Transistors Full Adder
Nonnegative Matrix Factorization with the Itakura-Saito Divergence: With Application to Music Analysis
Dense Monocular Depth Estimation in Complex Dynamic Scenes
A Continuous Relaxation of Beam Search for End-to-end Training of Neural Sequence Models
Antiseptics and Disinfectants: Activity, Action, and Resistance
Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs