Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper.
Query: A Novel Low-Power Low-Voltage CMOS 1-Bit Full Adder Cell with the GDI Technique
Performance analysis of low-power 1-bit CMOS full adder cells
A Novel CMOS Full Adder
A novel multiplexer-based low-power full adder
Low power high speed area efficient Error Tolerant Adder using gate diffusion input method
High Performance and Low Power 8 bit 16T full adder using MTCMOS Technique
AN ADIABATIC APPROACH FOR LOW POWER FULL ADDER DESIGN
Two new low-power and high-performance full adders
Design of area and power efficient full adder in 180nm
Gate Diffusion Input (GDI) logic in standard CMOS nanoscale process
A New design of 1-bit full adder based on XOR-XNOR gate
An Efficient Full Adder Design using Different Logic Styles
LOW POWER CMOS FULL ADDER DESIGN WITH 12 TRANSISTORS
Analysis and Performance Evaluation of 1-bit Full Adder Using Different Topologies
low power area efficient alu with low power full adder .
Comparative Analysis and Simulation of Different CMOS Full Adders Using Cadence in 90 nm Technology
low - voltage low - power cmos full adder - circuits , devices and systems , iee proceedings - .
CMOS Full-Adders for Energy-Efficient Arithmetic Applications
A High-Reliability, Low-Power Magnetic Full Adder
A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design
Analysis of various full-adder circuits in cadence
Indoor Localization of Mobile Robots Through QR Code Detection and Dead Reckoning Data Fusion
Unsupervised Perceptual Rewards for Imitation Learning
Key-Aggregate Searchable Encryption ( KASE ) For Group Data Sharing via Cloud Storage
Low-power logic styles: CMOS versus pass-transistor logic
Resource Allocation in NFV: A Comprehensive Survey