Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper.
Query: A Bang Bang Phase-Locked Loop Using Automatic Loop Gain Control and Loop Latency Reduction Techniques
An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang–Bang Phase-Frequency Detection
A Novel Phase-Locked Loop Based on Frequency Detector and Initial Phase Angle Detector
Phase locked loop design
PHASE LOCKED LOOPS-I 1 ECE-599 : Low Power , Adaptive Bandwidth Tracking Phase Locked Loop Design
Phase-Locked Loop Noise Reduction via Phase Detector Implementation for Single-Phase Systems
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops
Adaptive Spur Cancellation Technique in All-Digital Phase-Locked Loops
Noise analysis of phase-locked loops
Analysis and Design Techniques for Supply-Noise Mitigation in Phase-Locked Loops
Phase-domain all-digital phase-locked loop
Analysis of charge-pump phase-locked loops
A Low-Noise Wideband Digital Phase-Locked Loop Based on a Coarse–Fine Time-to-Digital Converter With Subpicosecond Resolution
A Frequency-Based Model for Limit Cycle and Spur Predictions in Bang-Bang All Digital PLL
An all-analog multiphase delay-locked loop using a replica delay line for wide-range operation and low-jitter performance
Replica compensated linear regulators for supply-regulated phase-locked loops
Tuning software phase-locked loop for series-connected converters
A design-oriented study of the nonlinear dynamics of digital bang-bang PLLs
AN ALL DIGITAL PHASE LOCKED LOOP
A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop
Constructionist Gaming: Understanding the Benefits of Making Games for Learning
A Branch and Bound Algorithm for Computing k-Nearest Neighbors
Wearable inertial sensors for human movement analysis.
A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital PLL With −36 dB EVM at 5 mW Power
Popularity-driven content caching