Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: Low Leakage Multi Threshold Level Shifter Design using Sleepy Keeper
Subthreshold to Above Threshold Level Shifter Design
New clock-gating techniques for low-power flip-flops
A high-voltage level shifter with sub-nano-second propagation delay for switching power converters
Energy-Efficient Wide-Range Voltage Level Shifters Reaching 4.2 fJ/Transition
Bi-directional input/output circuits with integrated level shifters for near-threshold computing
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop
Multi-threshold CMOS design for low power digital circuits
Design of voltage level shifter for multi-supply voltage design
CMOS Voltage Level-Up Shifter – A Review
Low Leakage Circuits Design with Optimized Gate-length Biasing
High performance CMOS dual supply level shifter for a 0.5V input and 1V output in standard 1.2V 65nm technology process
Design of a 1.8V-input 6.5V-output digital level shifter for trimming application
design of level shifter for multiple supply voltage soc .
A novel high-voltage 5.5 V resilient, floating and full-scale 3.3 V pulse-triggered level-shifter
Low Power Multiplier Design Using Complementary Pass-Transistor Asynchronous Adiabatic Logic
A 50V high-speed level shifter with high dv/dt immunity for multi-MHz DCDC converters
GALEOR: Leakage reduction for CMOS circuits
A Subthreshold to Above-Threshold Level Shifter Comprising a Wilson Current Mirror
A Depletion-Mode In–Ga–Zn–O Thin-Film Transistor Shift Register Embedded With a Full-Swing Level Shifter
Design and realisation of Low leakage 1-bit CMOS based Full Adder Cells for Mobile Applications
Next-Generation DNA Sequencing Methods
A 180-mV subthreshold FFT processor using a minimum energy design methodology
issues in dataflow computing .
Stock Market Forecasting Using Machine Learning Algorithms
One-shot achievability via fidelity