Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: A 6-bit 220-MS/s time-interleaving SAR ADC in 0.18-µm digital CMOS process
A 32mW 1.25GS/s 6b 2b/step SAR ADC in 0.13μm CMOS
A 10-bit 1GS/s 4-way TI SAR ADC with tap-interpolated FIR filter based time skew calibration
A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization
Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver
A 2-GS/s 8-bit Non-Interleaved Time-Domain Flash ADC Based on Remainder Number System in 65-nm CMOS
A 9.4-ENOB 1V 3.8μW 100kS/s SAR ADC with Time-Domain Comparator
A 12b 160MS/s synchronous two-step SAR ADC achieving 20.7fJ/step FoM with opportunistic digital background calibration
An energy-efficient dual sampling SAR ADC with reduced capacitive DAC
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
8-bit 22nW SAR ADC using output offset cancellation technique
A 6b 600MHz 10mW ADC array in digital 90nm CMOS
A 13-bit 160MS/s pipelined subranging-SAR ADC with low-offset dynamic comparator
An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS
A 4.86 mW 15-bit 22.5 MS/s pipelined ADC with 74 dB SNDR in 90 nm CMOS using averaging correlated level shifting technique
Chip design of a 12-bit 5MS/s fully differential SAR ADC with resistor-capacitor array DAC technique for wireless application
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS
A 22mW 10-bit 150-MS/s pipelined ADC in 1.2V 65nm CMOS
Analysis and Experimental Results of Interior DAC of SAR ADC using Cadence
A 53-nW 9.1-ENOB 1-kS/s SAR ADC in 0.13-$\mu$m CMOS for Medical Implant Devices
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS
Drug-drug Interaction Extraction via Recurrent Neural Network with Multiple Attention Layers
Automated test data generation using an iterative relaxation method
A 6b 600MHz 10mW ADC array in digital 90nm CMOS
Using of Co-simulation ADAMS-SIMULINK for development of mechatronic systems
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