Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: A Novel High-speed Adder-Subtractor Design based on CNFET
CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
Design a Low Power Half-Subtractor Using .90µm CMOS Technology
A novel CNTFET-based ternary logic gate design
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System
Low power high speed area efficient Error Tolerant Adder using gate diffusion input method
Enhanced low-power high-speed adder for error-tolerant application
Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
Comparative Analysis and Simulation of Different CMOS Full Adders Using Cadence in 90 nm Technology
Two new low-power and high-performance full adders
Design of Full Adder Circuit Using Double Gate MOSFET
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter
A novel multiplexer-based low-power full adder
AN ADIABATIC APPROACH FOR LOW POWER FULL ADDER DESIGN
Design of optimized reversible binary adder/subtractor and BCD adder
Analysis of various full-adder circuits in cadence
Area–Delay–Power Efficient Carry-Select Adder
A new low-power, low-area, parallel prefix Sklansky adder with reduced inter-stage connections complexity
A Novel CMOS Full Adder
Semi-custom design of adiabatic adder circuits
Low-Power and Area-Efficient Carry Select Adder
The Inflammasomes
Emotion Regulation and Psychopathology : The Role of Gender
A Sound Idea: Phonetic Effects of Brand Names on Consumer Judgments
Design And Implementation Of 2 Bit Ternary ALU Slice
Fraud detection and frequent pattern matching in insurance claims using data mining techniques