Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper
Query: ASLR on the Line: Practical Cache Attacks on the MMU
Eliminating Cache-Based Timing Attacks with Instruction-Based Scheduling
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches
A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-Volatile On-Chip Caches
Adaptive placement and migration policy for an STT-RAM-based hybrid cache
Reverse Engineering Intel DRAM Addressing and Exploitation
Cache Attacks and Countermeasures: the Case of AES
Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
BranchScope: A New Side-Channel Attack on Directional Branch Predictor
Cache miss equations: an analytical representation of cache misses
MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols
The evicted-address filter: a unified mechanism to address both cache pollution and thrashing
Implementation of a Memory Disclosure Attack on Memory Deduplication of Virtual Machines
Dynamic Partitioning of Shared Cache Memory
Spectre Attacks: Exploiting Speculative Execution
Exploiting Correcting Codes: On the Effectiveness of ECC Memory Against Rowhammer Attacks
Performance Analysis with Cache-Aware Roofline Model in Intel Advisor
Limiting cache-based side-channel in multi-tenant cloud using dynamic page coloring
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
A look at several memory management units, TLB-refill mechanisms, and page table organizations
Understanding and predicting classes of college students who use pornography
Consistent Re-identification in a Camera Network
Case handling: a new paradigm for business process support
Return-oriented programming without returns
Achieving Transformative Sustainability Learning: Engaging Head, Hands and Heart.