Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: Design and process variation analysis of CNTFET-based ternary memory cells
Design of a Ternary Memory Cell Using CNTFETs
Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits
CNTFET basics and simulation
High SNM 32nm CNFET based 6T SRAM Cell design considering transistor ratio
Impact of FinFET Technology Introduction in the 3T1D-DRAM Memory Cell
FinFET cells with different transistor sizing techniques against PVT variations
VLSI Design and Implementation of Ternary Logic Gates and Ternary SRAM Cell
Portfolio of FinFET memories: Innovative techniques for an emerging technology
A memristor-based TCAM (ternary content addressable memory) cell
Charge-Trapping Phenomena in HfO2-Based FeFET-Type Nonvolatile Memories
Advantage of CNTFET characteristics over MOSFET to reduce leakage power
Encoder-Based Optimization of CNFET-Based Ternary Logic Circuits
CNFET based ternary magnitude comparator
Sensitivity of Double-Gate and FinFET Devices to Process Variations
Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology
Low Power FinFET based 10T SRAM cell
impact of body coefficient and threshold voltage on cntfet with varying oxide thickness .
Nonvolatile memory design based on ferroelectric FETs
design approach towards high performance memory of 6 transistors sram cell using 45 nm cmos technology .
A comparative analysis of 6T, 7T, 8T and 9T SRAM cells in 90nm technology
Mashups: A Literature Review and Classification Framework
A Foundation for the Study of Personal Cloud Computing in Organizations
The multiple polynomial quadratic sieve
Functional Properties of Neurons in Middle Temporal Visual Area of the Macaque Monkey . I . Selectivity for Stimulus Direction , Speed , and Orientation
Design And Implementation Of 2 Bit Ternary ALU Slice