Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: An ultra-low area and full-swing output 3T XNOR gate using 45nm technology
Design methodologies for high-performance noise-tolerant XOR-XNOR circuits
A floating gate based 3D NAND technology with CMOS under array
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter
Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs
CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
Design of 16T full adder circuit using 6TXNOR gates
a high speed 8 transistor full adder design using novel 3 transistor xor gates .
Design of Logic Gates and Flip-Flops in High-Performance FinFET Technology
New clock-gating techniques for low-power flip-flops
22-nm fully-depleted tri-gate CMOS transistors
Design Of Ternary Logic Gates Using CNTFET
A new method on designing and simulating CNTFET_based ternary gates and arithmetic circuits
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
Ultra-low power digital subthreshold logic circuits
A clock gated flip-flop for low power applications in 90 nm CMOS
Power consumption in XOR-based circuits
Novel low power full adder cells in 180nm CMOS technology
Design and Evaluation of Multiple Valued Logic Gates Using Pseudo N-Type Carbon Nanotube FETs
High performance 32nm logic technology featuring 2nd generation high-k + metal gate transistors
Design a Low Power Half-Subtractor Using .90µm CMOS Technology
Random dot markers
The New Threat of Digital Marketing
Noise tolerant low voltage XOR-XNOR for fast arithmetic
Regions Matter: How Localized Social Capital Affects Innovation and External Knowledge Acquisition
Nonlinear projection with curvilinear distances: Isomap versus curvilinear distance analysis