Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: An optimized pipelined architecture of SHA-256 hash function
An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)
An FPGA implementation and comparison of the SHA-256 and Blake-256
Efficient parallel-pipelined GHASH for message authentication
FPGA-based Design Approaches of Keccak Hash Function
A compact FPGA implementation of the hash function whirlpool
Analysis of the Kupyna-256 Hash Function
An FPGA implementation of the SHA-3: The BLAKE hash function
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs
Improving SHA-2 hardware implementations
FPGA Implementation of Pipelined Blowfish Algorithm
Efficient hardware hashing functions for high performance computers
Compact implementation of SHA3-512 on FPGA
Optimising the SHA256 Hashing Algorithm for Faster and More Efficient Bitcoin Mining 1
Whirlpool hash function: architecture and VLSI implementation
A Design Principle for Hash Functions
high - speed parallel architecture of the whirlpool hash function .
Hardware design for Hash functions
Improvement on a Trapdoor Hash Function
Implementation of SHA-2 hash function for a digital signature System-on-Chip in FPGA
FPGA Implementations of the Round Two SHA-3 Candidates
Design principles of a human mimetic humanoid: Humanoid platform to study human intelligence and internal body system
PSAM 12-Probabilistic Safety Assessment and Management
Specular-to-Diffuse Translation for Multi-View Reconstruction
A 1 Gbit/s Partially Unrolled Architecture of Hash Functions SHA-1 and SHA-512
The VMware mobile virtualization platform: is that a hypervisor in your pocket?