Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: Determination of UART Receiver Baud Rate Tolerance
Design of a 9-bit UART module based on Verilog HDL
Ultra-low power time synchronization using passive radio receivers
Costas Loop Implementation for Synchronous Detection of Carrier in Radio Receiver
A novel measurement fixture for characterizing USB 3.0 radio frequency interference
A Blind Baud-Rate ADC-Based CDR
A 4.2 ps Time-Interval RMS Resolution Time-to-Digital Converter Using a Bin Decimation Method in an UltraScale FPGA
design and simulation of multi channel uart for serial communication .
0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver
Speed Error Mitigation for a DSP-Based Resolver-to-Digital Converter Using Autotuning Filters
An FPGA based low cost receiver for ultrasonic anemometer
A 40 Gb/s CMOS Serial-Link Receiver With Adaptive Equalization and Clock/Data Recovery
A 24-Gb/s Double-Sampling Receiver for Ultra-Low-Power Optical Communication
A Wide Tracking Range 0.2-4Gbps Clock and Data Recovery Circuit
CMOS transceiver with baud rate clock recovery for optical interconnects
A Differential Digitally Controlled Crystal Oscillator With a 14-Bit Tuning Resolution and Sine Wave Outputs for Cellular Applications
A 5Gb/s equalizer for USB 3.0 receiver in 65 nm CMOS technology
EQUALIZERS FOR HIGH-SPEED SERIAL LINKS
UHF Receiver Front-End: Implementation and Analog Baseband Design Considerations
A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network
A 10-bit 1GS/s 4-way TI SAR ADC with tap-interpolated FIR filter based time skew calibration
A feasible method for optimization with orthogonality constraints
Seamless Image Stitching in the Gradient Domain
A new approach to realize UART
Recurrent neural networks for short-term load forecasting
Illumination Decomposition for Photograph With Multiple Light Sources