Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper.
Query: High-Speed Parallel CRC Implementation Based on Unfolding, Pipelining, and Retiming
Parallel CRC Realization
CRC-16 polynomials optimized for applications using self-synchronous scramblers
A tutorial on CRC computations
High-Speed Parallel Decimal Multiplication with Redundant Internal Encodings
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
Exploiting parallelism for faster implementation of Bubble sort algorithm using FPGA
Cyclic redundancy code (CRC) polynomial selection for embedded networks
Programmable Asynchronous Pipeline Arrays
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup
DESIGN AND IMPLEMENTATION OF HIGH SPEED PARALLEL PREFIX LING ADDER
New parallelization and convergence results for NC: a negotiation-based FPGA router
Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis
A delay model and speculative architecture for pipelined routers
Area efficient parallel decoder architecture for long BCH codes
Novel architectures for efficient (m, n) parallel counters
Improved Design of High-Performance Parallel Decimal Multipliers
Parallel SIMD CPU and GPU Implementations of Berlekamp–Massey Algorithm and Its Error Correction Application
Pipelined implementation of AES encryption based on FPGA
A Near-Optimal Parallel Algorithm for One-Dimensional Gate Assignment in VLSI Layout
High-speed VLSI architectures for the AES algorithm
A Survey: Privacy Preservation Techniques in Data Mining
Experimental Control and Design of Low-Frequency Bias Networks for Dynamically Biased Amplifiers
The tea-leaf reader algorithm: an efficient implementation of CRC-16 and CRC-32
Deep learning-based pipeline to recognize Alzheimer's disease using fMRI data
Heart rate variability (HRV) in deep breathing tests and 5-min short-term recordings: agreement of ear photoplethysmography with ECG measurements, in 343 subjects