Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: A 6-bit CMOS Active Phase Shifter for Ku-Band Phased Arrays
Low Insertion Loss, Compact 4-bit Phase Shifter in 65 nm CMOS for 5G Applications
A Scalable Dual-Polarized 256-Element Ku-Band Phased-Array SATCOM Receiver with ±70° Beam Scanning
Low cost phased array for mobile Ku-band satellite terminal
Low-profile fully integrated 60 GHz 18 element phased array on multilayer liquid crystal polymer flip chip package
A 60GHz CMOS phased-array transceiver pair for multi-Gb/s wireless communications
Low-loss, wideband SPDT switches and switched-line phase shifter in 180-nm RF CMOS on SOI technology
A 90–100-GHz 4 $\times$ 4 SiGe BiCMOS Polarimetric Transmit/Receive Phased Array With Simultaneous Receive-Beams Capabilities
Substrate integrated waveguide (SIW) broadband compensating phase shifter
Broadband Fixed Phase Shifters
A Q-band (40–45 GHz) 16-element phased-array transmitter in 0.18-μm SiGe BiCMOS technology
A Compact X-Band Bi-Directional Phased-Array T/R Chipset in 0.13 $\mu{\hbox {m}}$ CMOS Technology
Fast and robust level shifters in 65 nm CMOS
Dual-Band Wide-Angle Scanning Planar Phased Array in X/Ku-Bands
High-Performance IQ Modulator-Based Phase Conjugator for Modular Retrodirective Antenna Array Implementation
A compact two-dimensional phased array using grounded coplanar-Waveguides Butler matrices
Planar phased array antenna for nomadic satellite communication in Ka-Band
Compact $S$ -/$Ka$-Band CMOS Quadrature Hybrids With High Phase Balance Based on Multilayer Transformer Over-Coupling Technique
A 0.28 THz Power-Generation and Beam-Steering Array in CMOS Based on Distributed Active Radiators
A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips
An overview of design techniques for CMOS phase detectors
Basic Concepts of Lexical Resource Semantics
Incremental Segmentation on Private Data without Catastrophic Forgetting
Review of clustering algorithms for microgrid formation
Design and Analysis of a 21–29-GHz Ultra-Wideband Receiver Front-End in 0.18-$\mu$ m CMOS Technology
rna - seq gene expression estimation with read mapping uncertainty .