Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: A Dual-V DD Low Power FPGA Architecture
Architecture evaluation for power-efficient FPGAs
An 8.5-ps Two-Stage Vernier Delay-Line Loop Shrinking Time-to-Digital Converter in 130-nm Flash FPGA
Design of VGA display controller based on FPGA and VHDL
A quantitative analysis of the speedup factors of FPGAs over processors
VHDL Implementation of 32-Bit Microprocessor
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
Performance Benefits of Monolithically Stacked 3-D FPGA
Accurate Area, Time and Power Models for FPGA-Based Implementations
Automatic generation of identical routing pairs for FPGA implemented DPL logic
Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs
HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping
Increasing the level of abstraction in FPGA-based designs
Efficient FPGA implementation of convolution
Design & Study of a Low Power High Speed Full Adder Using GDI Multiplexer
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System
Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA
VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation
Design and FPGA Prototyping of a DVB-S 2 Receiver : Towards a VLSI Implementation in CMOS
Secure FPGA circuits using controlled placement and routing
Design And Analysis Of Low Power And High Speed Double Tail Comparator
Co-Evolution in the Successful Learning of Backgammon Strategy
Cognitive enhancing effects of modafinil in healthy volunteers
Bayesian autocalibration for surveillance
Unifying Map and Landmark Based Representations for Visual Navigation
FPGA routing architecture: segmentation and buffering to optimize speed and density