Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: A 13-bit 200MS/s PIPELINE ADC in 0.13µm CMOS
A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering
A 24GS/s 6b ADC in 90nm CMOS
A 17-nW, 0.5V, 500S/s, rail-to-rail SAR ADC with 8.1 effective number of bits
Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC
A 2-GS/s 8-bit Non-Interleaved Time-Domain Flash ADC Based on Remainder Number System in 65-nm CMOS
100MS/s 9-bit 0.43mW SAR ADC with custom capacitor array
A digital nonlinearity correction technique for pipelined ADC's
A 0.35 /spl mu/m CMOS comparator circuit for high-speed ADC applications
A 16 bit linear passive-charge-sharing SAR ADC in 55nm CMOS
An all-digital ADC/TDC for sensor interface with TAD architecture in 0.18-µm digital CMOS
A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS
A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration
A power scalable SAR-ADC in 0.18µm-CMOS with 0.5V nano-watt operation
A fast digital calibration algorithm for pipeline ADC
A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC
A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS
A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 $\mu$ m CMOS
Performance Analysis of 4-bit Flash ADC with Different Comparators Designed in 0. 18um Technology
A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs
A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS
Addressing cloud computing security issues
3D printed tactile picture books for children with visual impairments: a design probe
A 15-b 1-Msample/s digitally self-calibrated pipeline ADC
Design and evaluation of UAV swarm command and control strategies
approaches to visualising linked data : a survey .