Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: Low power fast Ethernet line driver
A 65nm CMOS self-terminated open-drain IDAC line driver suitable for fast Ethernet applications
A Compact EADFB Laser Array Module for a Future 100-Gb/s Ethernet Transceiver
A 5.5 V SOPA line driver in a standard 1.2 V 0.13 /spl mu/m CMOS technology
A power-efficient LVDS driver circuit in 0.18-μm CMOS technology
High Voltage High Speed Low Power Rail-to-Rail Source Driver for 8-bit Large TFT LCD Applications
High-speed LED driver for visible light communications with drawing-out of remaining carrier
A 3.3-V CMOS adaptive analog video line driver with low distortion performance
A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS
A low-swing AC- and DC- coupled voltage-mode driver with pre-emphasis
A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant- ${\rm G}_{\rm m}$ Bias
LVDS driver design for high speed serial link in 0.13um CMOS technology
A Low Power Quad 25.78-Gbit/s 2.5 V Laser Diode Driver Using Shunt-Driving in 0.18 µm SiGe-BiCMOS
A High-Speed LED Driver That Sweeps Out the Remaining Carriers for Visible Light Communications
A low-power 6.6-Gb/s wireline transceiver for low-cost FPGAs in 28nm CMOS
100Gb/s ethernet chipsets in 65nm CMOS technology
Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface
Package design for high-speed SerDes
A Novel System in Package with Fan-Out WLP for High Speed SERDES Application
A CMOS Class-D Line Driver Employing a Phase-Locked Loop Based PWM Generator
LOW POWER HIGH SPEED I/O INTERFACES IN 0.18um CMOS
Dominant Sets and Pairwise Clustering
Design and Analysis of Energy-Efficient Reconfigurable Pre-Emphasis Voltage-Mode Transmitters
Computational Principles of Supervised Learning in the Cerebellum.
Lightweight Cryptography and DPA Countermeasures: A Survey
Energy Shaping Control of an Inverted Flexible Pendulum Fixed to a Cart