Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper.
Query: High Performance Table-Based Algorithm for Pipelined CRC Calculation
High-Speed Parallel CRC Implementation Based on Unfolding, Pipelining, and Retiming
Implementation of Low Area and High Data Throughput CRC Design on FPGA
The tea-leaf reader algorithm: an efficient implementation of CRC-16 and CRC-32
Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation
Cyclic redundancy code (CRC) polynomial selection for embedded networks
High throughput pipelined hardware implementation of the KECCAK hash function
Single bit error correction implementation in CRC-16 on FPGA
An optimized pipelined architecture of SHA-256 hash function
FPGA Implementation of Pipelined Blowfish Algorithm
DDS Based on Pipelined CORDIC Algorithm with Communication System
CRC-16 polynomials optimized for applications using self-synchronous scramblers
Parallel SIMD CPU and GPU Implementations of Berlekamp–Massey Algorithm and Its Error Correction Application
Exploring the use of shift register lookup tables for Keccak implementations on Xilinx FPGAs
High Performance Single-Chip FPGA Rijndael Algorithm Implementations
50 Years of CORDIC: Algorithms, Architectures, and Applications
A comparative study of arbitration algorithms for the Alpha 21364 pipelined router
Implementation of Cyclic Redundancy Check in Data Communication
High performance SHA-2 core using the Round Pipelined Technique
Efficient implementation of the Galois Counter Mode using a carry-less multiplier and a fast reduction algorithm
Rate-compatible punctured convolutional codes (RCPC codes) and their applications
Dialogue Act Classification in Domain-Independent Conversations Using a Deep Recurrent Neural Network
Parallel CRC Realization
Edge Computing in IoT Ecosystems for UAV-Enabled Early Fire Detection
Dual Attention Network for Scene Segmentation
Learning Stable Stochastic Nonlinear Dynamical Systems