Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper
Query: High-Speed Parallel Decimal Multiplication with Redundant Internal Encodings
Improving the Speed of Parallel Decimal Multiplication
Low-power parallel multiplier with column bypassing
Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number System
High speed and area efficient vedic multiplier
High speed signed multiplier for Digital Signal Processing applications
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers
Modified Partial Product Generator for Redundant Binary Multiplier with High Modularity and Carry-Free Addition
A New VLSI Architecture of Parallel Multiplier–Accumulator Based on Radix-2 Modified Booth Algorithm
Comparison of a 32-bit Vedic multiplier with a conventional binary multiplier
An efficient floating point multiplier design for high speed applications using Karatsuba algorithm and Urdhva-Tiryagbhyam algorithm
Performance analysis for Vedic multiplier using modified full adders
Design and implementation of floating point multiplier based on Vedic Multiplication Technique
FASTER INTEGER MULTIPLICATION
Design and evaluation of an approximate Wallace-Booth multiplier
Speed Comparison of 16x16 Vedic Multipliers
Design and implementation of 64 bit multiplier using vedic algorithm
A Scalable Architecture for Montgomery Multiplication
Compressor trees for decimal partial product reduction
DESIGN AND IMPLEMENTATION OF HIGH SPEED PARALLEL PREFIX LING ADDER
Clock Multiplication Techniques Using Digital Multiplying Delay-Locked Loops
Decimal multiplication with efficient partial product generation
Network text sentiment analysis method combining LDA text representation and GRU-CNN
Concepts and semantic relations in information science
Video Saliency Incorporating Spatiotemporal Cues and Uncertainty Weighting
Analysis of wing twist effects on hover flight dynamics of a single rotor aerial craft