Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: Normally-off high-voltage p-GaN gate GaN HFET with carbon-doped buffer
Recessed-gate structure approach toward normally off high-Voltage AlGaN/GaN HEMT for power electronics applications
Investigation of High-Electric-Field Degradation Effects in AlGaN/GaN HEMTs
GaN X-band 43% internally-matched FET with 60W output power
A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs
A 20 W GaN HEMT VHF/UHF Class-D power amplifier
Gate Injection Transistor (GIT)—A Normally-Off AlGaN/GaN Power Transistor Using Conductivity Modulation
S-band internally harmonic matched GaN FET with 330W output power and 62% PAE
High temperature (≫200°C) isolated gate drive topologies for Silicon Carbide (SiC) JFET
Series-connected GaN transistors for ultra-fast high-voltage switch (>1kV)
Characterization and Analysis of an Innovative Gate Driver and Power Supplies Architecture for HF Power Devices With High dv/dt
Investigation of the four-gate action in G/sup 4/-FETs
Simulation and optimization of GaN-based metal-oxide-semiconductor high-electron-mobility-transistor using field-dependent drift velocity model
A 97.8% Efficient GaN HEMT Boost Converter With 300-W Output Power at 1 MHz
Transfer characteristics and high frequency modeling of logic gates using carbon nanotube field effect transistors (CNT-FETs)
A 95% Efficient Normally-Off GaN-on-Si HEMT Hybrid-IC Boost-Converter with 425-W Output Power at 1 MHz
Evidence of Time-Dependent Vertical Breakdown in GaN-on-Si HEMTs
A wide bandgap silicon carbide (SiC) gate driver for high-temperature and high-voltage applications
1.8kVAlGaN/GaN HEMTswithHigh-k/Oxide/SiN MISStructure
Design and Characterization of High-Voltage 4H-SiC p-IGBTs
High breakdown Voltage undoped AlGaN-GaN power HEMT on sapphire substrate and its demonstration for DC-DC converter application
Governance on the Drug Supply Chain via Gcoin Blockchain
The insulated gate rectifier (IGR): A new power switching device
Strategies for Lean Product Development
A 9 bit, 1.12 ps Resolution 2.5 b/Stage Pipelined Time-to-Digital Converter in 65 nm CMOS Using Time-Register
View Synthesis by Appearance Flow