Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: A low-offset high-speed double-tail dual-rail dynamic latched comparator
A low-noise self-calibrating dynamic comparator for high-speed ADCs
Comparative Analysis of Static and Dynamic CMOS Logic Design
A 200ns settling time fully integrated low power LDO regulator with comparators as transient enhancement
A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop
High-performance and low-power conditional discharge flip-flop
A low-voltage low-power fully differential rail-to-rail input/output opamp in 65-nm CMOS
A high speed low noise CMOS dynamic full adder cell
Kickback noise reduction techniques for CMOS latched comparators
Design of ultra high-speed CMOS CML buffers and latches
Design of ultrahigh-speed low-voltage CMOS CML buffers and latches
A Dual-Loop Delay-Locked Loop Using Multiple Voltage-Controlled Delay Lines
Simulation and Analysis of Random Decision Errors in Clocked Comparators
CMOS current comparator with Regenerative property
“The CMOS Inverter” as a Comparator in ADC Designs
CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations
CNFET based ternary magnitude comparator
2-Bit magnitude comparator using GDI technique
DESIGN OF 9 BIT SAR ADC USING HIGH SPEED AND HIGH RESOLUTION OPEN LOOP CMOS COMPARATOR IN 180NM TECHNOLOGY WITH R-2R DAC TOPOLOGY
An RC Oscillator With Comparator Offset Cancellation
1 technology and industry evolution .
Offset compensation in comparators with minimum input-referred supply noise
The Communicative Functions of Touch in Humans, Nonhuman Primates, and Rats: A Review and Synthesis of the Empirical Research
Semantic Localization in the PCL library
RCMC: Recognizing Crowd-Mobility Patterns in Cities Based on Location Based Social Networks Data