Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: Dual-$V_{th}$ Independent-Gate FinFETs for Low Power Logic Circuits
Gate sizing: finFETs vs 32nm bulk MOSFETs
CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
A Split Gate Power FINFET With Improved ON-Resistance and Switching Performance
Complementary silicide source/drain thin-body MOSFETs for the 20 nm gate length regime
Supply and Threshold Voltage Scaling for Low Power CMOS
Circuit design issues in multi-gate FET CMOS technologies
Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology
Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept
FinFET scaling to 10 nm gate length
A Novel High Performance Low Power Universal Gate Implementation in Subthreshold Region
Layout engineering to suppress hysteresis of negative capacitance FinFET
Translinear Circuits Using Subthreshold Floating-Gate MOS Transistors
Design and Evaluation of Multiple Valued Logic Gates Using Pseudo N-Type Carbon Nanotube FETs
CMOS-Compatible Vertical-Silicon-Nanowire Gate-All-Around p-Type Tunneling FETs With $\leq 50$-mV/decade Subthreshold Swing
Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits
Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric
Compact modeling solution of layout dependent effect for FinFET technology
Investigation of the four-gate action in G/sup 4/-FETs
Gate-Induced Drain Leakage Reduction in Cylindrical Dual-Metal Hetero-Dielectric Gate All Around MOSFET
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
Exploring personalized neural conversational models
A folded-channel MOSFET for deep-sub-tenth micron era
Identification of Seminal Stains
Opinion observer: analyzing and comparing opinions on the Web
Structural similarity based link prediction in social networks using firefly algorithm