Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper
Query: An ultra high density pseudo dual-port SRAM in 16nm FINFET process for graphics processors
A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry
Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist
A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead
A high-speed, low-power 3D-SRAM architecture
Performance and Area Scaling Benefits of FD-SOI Technology for 6-T SRAM Cells at the 22-nm Node
Low Standby Power and Robust FinFET Based SRAM Design
Ultralow-Voltage Process-Variation-Tolerant Schmitt-Trigger-Based SRAM Design
12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications
A performance comparison of contemporary DRAM architectures
A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin
A Priority-Based 6T/8T Hybrid SRAM Architecture for Aggressive Voltage Scaling in Video Applications
An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs
A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20nm FinFET technologies
Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement
High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM
An SRAM Design in 65nm and 45nm Technology Nodes Featuring Read and Write-Assist Circuits to Expand Operating Voltage
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors
A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm2 SRAM cell size
High-density low-power-operating DRAM device adopting 6F/sup 2/ cell scheme with novel S-RCAT structure on 80nm feature size and beyond
High SNM 32nm CNFET based 6T SRAM Cell design considering transistor ratio
Deep learning for undersampled MRI reconstruction
A 16nm FinFET CMOS technology for mobile SoC and computing applications
The role of multiple chemotactic mechanisms in a model of chemotaxis in C. elegans: different mechanisms are specialised for different environments
The Case for Learned Index Structures
Xanthine oxidoreductase: a journey from purine metabolism to cardiovascular excitation-contraction coupling.