Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper
Query: A network on chip architecture and design methodology
network on chip : an architecture for billion transistor era .
Survey of Network on Chip (NoC) Architectures & Contributions
Xpipes: a network-on-chip architecture for gigascale systems-on-chip
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
Explorations of Honeycomb Topologies for Network-on-Chip
Methods for fault tolerance in networks-on-chip
Low-power network-on-chip for high-performance soc design
A Layer-Multiplexed 3D On-Chip Network Architecture
Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation
AEthereal network on chip: concepts, architectures, and implementations
Design Space Exploration of Network Processor Architectures
Software defined Network-on-Chip for scalable CMPs
Scalable network-on-chip architecture for configurable neural networks
Design tradeoffs for tiled CMP on-chip networks
Energy characterization of a tiled architecture processor with on-chip networks
GARNET: A detailed on-chip network model inside a full-system simulator
Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems
The design and implementation of arbiters for Network-on-chips
BIST for network-on-chip interconnect infrastructures
Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures
Relief-Based Feature Selection: Introduction and Review
Single-tube, nested PCR for the diagnosis of human brucellosis in Kuwait.
Histogram refinement for content-based image retrieval
Deep Captioning with Attention-Based Visual Concept Transfer Mechanism for Enriching Description
A delay model and speculative architecture for pipelined routers