Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper.
Query: High-Speed Parallel Hardware Architecture for Galois Counter Mode
The Galois/Counter Mode of Operation (GCM)
Screaming Fast Galois Field Arithmetic Using Intel SIMD Instructions
A Compact Rijndael Hardware Architecture with S-Box Optimization
Faster and Timing-Attack Resistant AES-GCM
High-speed Side-channel-protected Encryption and Authentication in Hardware.
Accelerating Encryption Algorithms Using Parallelism
Pipelined implementation of AES encryption based on FPGA
On Software Implementation of High Performance GHASH Algorithms
Counter Chain: A New Block Cipher Mode of Operation
Implementation and Performance of the Simon and Speck Lightweight Block Ciphers on ASICs
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs
FPGA-Based Assessment of Midori and Gift Lightweight Block Ciphers
Efficient Implementation of AES Algorithm in FPGA Device
Successfully Attacking Masked AES Hardware Implementations
FPGA Implementation of Pipelined Blowfish Algorithm
CoARX: a coprocessor for ARX-based cryptographic algorithms
Very compact FPGA implementation of the AES algorithm
Automated Analysis and Synthesis of Block-Cipher Modes of Operation
Exploiting Parallelism on Keccak: FPGA and GPU Comparison
Hardware Implementation of Involutional SPN Block Ciphers
Toxicity and Biodegradation Testing
BSA: A Complete Coverage Algorithm
Privacy and authentication: An introduction to cryptography
Biodiesel Fuel Production by Transesterification of Oils
2 Substrate Specificity of MMPs