Instruct: Given a paper title, retrieve paper titles that are cited by the given paper.
Query: A 3.9-ps RMS Precision Time-to-Digital Converter Using Ones-Counter Encoding Scheme in a Kintex-7 FPGA
A 128-Channel, 710 M Samples/Second, and Less Than 10 ps RMS Resolution Time-to-Digital Converter Implemented in a Kintex-7 FPGA
A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 $\mu{\hbox {m}}$ CMOS Technology
A high-precision time-to-digital converter for pulsed time-of-flight laser radar applications
ADC and TDC implemented using FPGA
A 9 bit, 1.12 ps Resolution 2.5 b/Stage Pipelined Time-to-Digital Converter in 65 nm CMOS Using Time-Register
A 1.7 ps Equivalent Bin Size and 4.2 ps RMS FPGA TDC Based on Multichain Measurements Averaging Method
Recent Developments and Design Challenges of High-Performance Ring Oscillator CMOS Time-to-Digital Converters
A 0.5ps 1.4mW 50MS/s Nyquist bandwidth time amplifier based two-step flash-ΔΣ time-to-digital converter
Fully-digital time based ADC/TDC in 0.18μm CMOS
1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS
A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps
The 10-ps wave union TDC: Improving FPGA TDC resolution beyond its cell delay
A Digital PLL With a Stochastic Time-to-Digital Converter
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter
A 300-MS/s, 1.76-ps-Resolution, 10-b Asynchronous Pipelined Time-to-Digital Converter With on-Chip Digital Background Calibration in 0.13-µm CMOS
An FPGA-based all-digital transmitter with 28-GHz time-interleaved delta-sigma modulation
A Low-Noise Wideband Digital Phase-Locked Loop Based on a Coarse–Fine Time-to-Digital Converter With Subpicosecond Resolution
A high-resolution multi-channel time-to-digital converter (TDC) for high-energy physics and biomedical imaging applications
27.6 A 0.7pF-to-10nF fully digital capacitance-to-digital converter using iterative delay-chain discharge
A Low-Power Gateable Vernier Ring Oscillator Time-to-Digital Converter for Biomedical Imaging Applications
Extraction of Slum Areas From VHR Imagery Using GLCM Variance
An improved deep learning architecture for person re-identification
Cluster head selection using hesitant fuzzy in Wireless Sensor Networks
A 300-MS/s, 1.76-ps-Resolution, 10-b Asynchronous Pipelined Time-to-Digital Converter With on-Chip Digital Background Calibration in 0.13-µm CMOS
Factors Associated with Poor Glycemic Control among Patients with Type 2 Diabetes Mellitus in Ambo Hospital, Ambo; Ethiopia