Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper.
Query: An Analysis of Latch Comparator Offset Due to Load Capacitor Mismatch
A dynamic analysis of a latched CMOS comparator
Closed-loop simulation method for evaluation of static offset in discrete-time comparators
Improved StrongARM latch comparator: Design, analysis and performance evaluation
A low-offset high-speed double-tail dual-rail dynamic latched comparator
A NOVEL CMOS DYNAMIC LATCH COMPARATOR FOR LOW POWER AND HIGH SPEED
A new latch comparator with tunable hysteresis
Design and comparison of CMOS Current Mode Logic latches
A 1.2V 246uW CMOS latched comparator with neutralization technique for reducing Kickback Noise
Analyses of Static and Dynamic Random Offset Voltages in Dynamic Comparators
A Low-Power High-Precision Comparator With Time-Domain Bulk-Tuned Offset Cancellation
Comparative Analysis of Master-Slave Latches and Flip-Flops for High-Performance and Low-Power Systems
A precision variable-supply CMOS comparator
A low-power dynamic comparator with time-domain bulk-driven offset cancellation
Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input
Offset-corrected 5GHz CMOS dynamic comparator using bulk voltage trimming: Design and analysis
A Low-Kickback-NoiseLatched Comparator for High-SpeedFlashAnalog-to-Digita l Converters
0.23-V Sample-Boost-Latch-Based Offset Tolerant Sense Amplifier
design issues in cmos differential lc oscillators .
Optimizing MOS Transistor Mismatch
An RC Oscillator With Comparator Offset Cancellation
Risk of Encountering Dorsal Scapular and Long Thoracic Nerves during Ultrasound-guided Interscalene Brachial Plexus Block with Nerve Stimulator
UWB Antenna With Single or Dual Band-Notches for Lower WLAN Band and Upper WLAN Band
Stylized caustics: progressive rendering of animated caustics
A precision variable-supply CMOS comparator
2 hr sourcing and shoring : strategies , drivers , success factors and implications for hr .