Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper.
Query: Cache Simulation for Instruction Set Simulator QEMU
QEMU, a Fast and Portable Dynamic Translator
Incorporating simulation and implementation into teaching computer organization and architecture
Deterministic Replay of System's Execution with Multi-target QEMU Simulator for Dynamic Analysis and Reverse Debugging
On the Cache Behavior of SPLASH-2 Benchmarks on ARM and ALPHA Processors in Gem5 Full System Simulator
ViSiMIPS: Visual simulator of MIPS32 pipelined processor
Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy
DRAMsim: a memory system simulator
Teaching Computer Organization and Architecture Using Simulation and FPGA Applications
Exploiting instruction level parallelism in processors by caching scheduled groups
InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy
An evaluation of speculative instruction execution on simultaneous multithreaded processors
Step-by-step design and simulation of a simple CPU architecture
Teaching Computer Architecture and Organization using Simulation and FPGAs
Mapping the Intel last-level cache
MicroLib: A Case for the Quantitative Comparison of Micro-Architecture Mechanisms
Emulation of obsolete hardware in open source virtualization software
Full-System Simulation of Java Workloads with RISC-V and the Jikes Research Virtual Machine
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems
Mambo a full system simulator for the PowerPC architecture
Superscalar Instruction Execution in the 21164 Alpha Microprocessor
SimICS/sun4m: A VIRTUAL WORKSTATION
Visual saliency in image quality assessment
Marker-controlled watershed segmentation of nuclei in H&E stained breast cancer biopsy images
Bridging OpenCL and CUDA: a comparative analysis and translation
Reverse Engineering of Design Patterns from Java Source Code