Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones
An asynchronous dataflow FPGA architecture
A Practical Methodology for the Formal Verification of RISC Processors
Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability
synchronous programming of reactive systems .
On Hardware Synthesis of Reconfigurable Logic Controllers From Ladder Diagrams According to IEC61131-3
Controller synthesis for pipelined circuits using uninterpreted functions
Ramulator: A Fast and Extensible DRAM Simulator
Reducing memory access latency with asymmetric DRAM bank organizations
Compact architecture for high-throughput regular expression matching on FPGA
Evaluation of RISC-V RTL with FPGA-Accelerated Simulation
Reverse compilation for digital signal processors: a working example
StarSync: An extendable standard-cell mesochronous synchronizer
Asynchronous Adiabatic Logic
An out-of-order superscalar processor on FPGA: The ReOrder Buffer design
SMART: A single-cycle reconfigurable NoC for SoC applications
Design and DfT of a high-speed area-efficient embedded asynchronous FIFO
Synthesis and Optimization of Reversible Circuits - A Survey
An efficient implementation of D-Flip-Flop using the GDI technique
Approximate logic synthesis for error tolerant applications
Architecture and Simulation of Timing Synchronization Circuits for the FPGA Implementation of Narrowband Waveforms
Open core protocol (OCP) clock domain crossing interfaces
On the role of semantics in automated requirements tracing
Neural Network Models for Paraphrase Identification, Semantic Textual Similarity, Natural Language Inference, and Question Answering
YouTube as a Source of Information on Immunization: A Content Analysis
Programmable Asynchronous Pipeline Arrays