Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper.
Query: Low-Power and Area-Efficient Carry Select Adder
Area–Delay–Power Efficient Carry-Select Adder
A new low-power, low-area, parallel prefix Sklansky adder with reduced inter-stage connections complexity
CMOS implementation of efficient 16-Bit square root carry-select adder
Performance analysis of low-power 1-bit CMOS full adder cells
Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit
High-Performance Low-Power Carry Speculative Addition With Variable Latency
Low-Power High Speed 1-bit Full Adder Circuit Design
Carry speculative adder with variable latency for low power VLSI
Low power and area efficient Wallace tree multiplier using carry select adder with binary to excess-1 converter
A novel low-power full-adder cell for low voltage
Two new low-power and high-performance full adders
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System
Study of Design and Analysis of Low-Power 10-Transistor Full Adders Using Novel XOR–XNOR Gates
Low power high speed area efficient Error Tolerant Adder using gate diffusion input method
Novel low power full adder cells in 180nm CMOS technology
Design of Vedic-multiplier using area-efficient Carry Select Adder
Design of area efficient and low power multipliers using multiplexer based full adder
Design of 64-bit low power parallel prefix VLSI adder for high speed arithmetic circuits
LOW POWER CMOS FULL ADDER DESIGN WITH 12 TRANSISTORS
AN ADIABATIC APPROACH FOR LOW POWER FULL ADDER DESIGN
Bayesian Locality Sensitive Hashing for Fast Similarity Search
DP-MCDBSCAN: Differential Privacy Preserving Multi-Core DBSCAN Clustering for Network User Data
Diabetes Insipidus
Thermoelectric Converters of Human Warmth for Self-Powered Wireless Sensor Nodes
Duplicating road patterns in south african informal settlements using procedural techniques