Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: A 0.4-to-1 V Voltage Scalable $\Delta \Sigma $ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS
A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS
A 22mW 10-bit 150-MS/s pipelined ADC in 1.2V 65nm CMOS
A 1.8V 36-mW 11-bit 80MS/s pipelined ADC using capacitor and opamp sharing
500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC
Metrological characterization of high-performance delta-sigma ADCs: A case study of CERN DS-22
Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator
A 6.3 µW 20 bit Incremental Zoom-ADC with 6 ppm INL and 1 µV Offset
A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching
A 14-bit Hybrid Incremental Sigma-Delta/Cyclic ADC for X-ray Linear Array Sensor
A 0.039mm2 inverter-based 1.82mW 68.6dB-SNDR 10MHz-BW CT-ΣΔ-ADC in 65nm CMOS
A power scalable SAR-ADC in 0.18µm-CMOS with 0.5V nano-watt operation
A 0.5 V feedforward delta-sigma modulator with inverter-based integrator
A 12-Bit High-Speed Column-Parallel Two-Step Single-Slope Analog-to-Digital Converter (ADC) for CMOS Image Sensors
A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems
A 1.8V 1MS/s rail-to-rail 10-bit SAR ADC in 0.18μm CMOS
A four bit low power 165MS/s flash-SAR ADC for sigma-delta ADC application
A 4 GHz Continuous-Time $\Delta\Sigma$ ADC With 70 dB DR and $-$74 dBFS THD in 125 MHz BW
A 10-bit asynchronous SAR ADC with scalable conversion time in 0.18μm CMOS
Design of a High Efficiency DC–DC Buck Converter With Two-Step Digital PWM and Low Power Self-Tracking Zero Current Detector for IoT Applications
Analysis and Design of High Speed Low Power Comparator in ADC
ADAGIO: Interactive Experimentation with Adversarial Attack and Defense for Audio
Nonlinear Disturbance Observer Design For Robotic Manipulators
A swarm intelligent method for traffic light scheduling: application to real urban traffic networks
clique is hard to approximate within n 1 - c .
A Reconfigurable 40-to-67 dB SNR, 50-to-6400 Hz Frame-Rate, Column-Parallel Readout IC for Capacitive Touch-Screen Panels