Instruct: Given a paper title, retrieve paper titles that are cited by the given paper
Query: Design of Majority Logic (ML) Based Approximate Full Adders
New Metrics for the Reliability of Approximate and Probabilistic Adders
A New design of 1-bit full adder based on XOR-XNOR gate
2T 2:1 MUX based 1 bit full adder design
Design of area and power efficient full adder in 180nm
Full Adder Circuits using Static Cmos Logic Style: A Review
Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
Comparative Performance Analysis of XOR-XNOR Function Based High-Speed CMOS Full Adder Circuits For Low Voltage VLSI Design
Design of Power and Area Efficient Approximate Multipliers
Performance analysis of 1 bit full adder using GDI logic
Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit
A high speed low noise CMOS dynamic full adder cell
Design of new full adder cell using hybrid-CMOS logic style
Comparative study of full adder circuit with 32nm MOSFET, DG-FinFET and CNTFET
Approximate Sum-of-Products Designs Based on Distributed Arithmetic
Energy-efficient inexact speculative adder with high performance and accuracy control
Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies
Design of area efficient and low power multipliers using multiplexer based full adder
Design of Full Adder Circuit Using Double Gate MOSFET
Design of 16T full adder circuit using 6TXNOR gates
Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications
Action, Outcome, and Value A Dual-System Framework for Morality
Invited - Cross-layer approximate computing: from logic to architectures
Adaptive Path Planning for Tracking Ocean Fronts with an Autonomous Underwater Vehicle
DETRAC: A New Benchmark and Protocol for Multi-Object Tracking
Battery Management System