Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper
Query: A Review on the ESD Robustness of Drain-Extended MOS Devices
High-Voltage CMOS ESD and the Safe Operating Area
Improved single-event hardness of trench power MOSFET with a widened split gate
I-MOS: a novel semiconductor device with a subthreshold slope lower than kT/q
Process & design impact on BVDSS stability of a shielded gate trench power MOSFET
Power LDMOS with novel STI profile for improved Rsp, BVdss, and reliability
Enhanced shielded-gate trench MOSFETs for high-frequency, high-efficiency computing power supply applications
A physically based scalable SPICE model for Shielded-Gate Trench Power MOSFETs
Complementary silicide source/drain thin-body MOSFETs for the 20 nm gate length regime
A High-Speed Deep-Trench MOSFET With a Self-Biased Split Gate
Active-source-pump (ASP) technique for ESD design window expansion and ultra-thin gate oxide protection in sub-90nm technologies
Modeling snapback of LVTSCR devices for ESD circuit simulation using advanced BJT and MOS models
Full-Component Modeling and Simulation of Charged Device Model ESD
A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC
Increasing the breakdown capability of superjunction power MOSFETs at the edge of the active region
ESD protection design in a-IGZO TFT technologies
A novel on-chip ESD protection circuit for GaAs HBT RF power amplifiers
Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides
COSS hysteresis in advanced superjunction MOSFETs
Design criteria for shoot-through elimination in Trench Field Plate Power MOSFET
Electromagnetic homeostasis and the role of low-amplitude electromagnetic fields on life organization.
Silicon quantum photonics
Depth camera SLAM on a low-cost WiFi mapping robot
Simulation of pick and place robotics system using Solidworks Softmotion
A double RESURF LDMOS with drain profile engineering for improved ESD robustness