Instruct: Given the title of a scientific paper, retrieve paper titles that are cited by the given paper.
Query: An FPGA implementation architecture for decoding of polar codes
Polar codes for channel and source coding
Iterative decoding of binary block and convolutional codes
FPGA Implementation of Viterbi Decoder using Trace back Architecture
a universal lattice code decoder for fading channels .
Simple Hybrid ARQ Schemes Based on Systematic Polar Codes for IoT Applications
Lattice code decoder for space-time codes
Review : Design And Implementation Of Reed Solomon Encoder And Decoder
Cost-effective scalable QC-LDPC decoder designs for non-volatile memory systems
FFT Based Sum-Product Algorithm for Decoding LDPC Lattices
A 1.6-mm2 38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM
FPGA implementation of digital modulation techniques
Reduced complexity iterative decoding of low-density parity check codes based on belief propagation
Modified greedy permutation algorithm for low complexity encoding in LDPC codes
Successive Cancellation List Polar Decoder using Log-likelihood Ratios
Deep Learning for Decoding of Linear Codes - A Syndrome-Based Approach
A New Design of HDB3 Encoder and Decoder Based on FPGA
Near Optimum Error Correcting Coding and Decoding: TurboCodes
Analysis of sum-product decoding of low-density parity-check codes using a Gaussian approximation
An efficient multi-rate LDPC-CC decoder with layered decoding algorithm
Sparse Code Multiple Access Decoding Based on a Monte Carlo Markov Chain Method
Failure Mode and Effect Analysis Using Cloud Model Theory and PROMETHEE Method
A breakthrough in Speech emotion recognition using Deep Retinal Convolution Neural Networks
STMaker - A System to Make Sense of Trajectory Data
Generating Reference Texts for Short Answer Scoring Using Graph-based Summarization
A performance comparison of polar codes and Reed-Muller codes