Instruct: Given a scientific paper title, retrieve paper titles that are cited by the given paper
Query: 7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes
Exploring sub-20nm FinFET design with predictive technology models
Sub-60-mV/decade Negative Capacitance FinFET With Sub-10-nm Hafnium-Based Ferroelectric Capacitor
Lateral NWFET optimization for beyond 7nm nodes
Impact of FinFET Technology Introduction in the 3T1D-DRAM Memory Cell
Influence of stress induced CT local layout effect (LLE) on 14nm FinFET
Layout engineering to suppress hysteresis of negative capacitance FinFET
Design of Logic Gates and Flip-Flops in High-Performance FinFET Technology
Enhancing noise margins of FinFET SRAM by integrating Vth-controllable flexible-pass-gates
The Impact of Layout-Dependent STI Stress and Effective Width on Low-Frequency Noise and High-Frequency Performance in Nanoscale nMOSFETs
Portfolio of FinFET memories: Innovative techniques for an emerging technology
28-nm UTBB FD-SOI vs. 22-nm Tri-Gate FinFET Review: A Designer Guide—Part II
Optimization of power and energy in FinFET based SRAM cell using adiabatic logic
A Thermal-Aware Device Design Considerations for Nanoscale SOI and Bulk FinFETs
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
An enhanced 16nm CMOS technology featuring 2nd generation FinFET transistors and advanced Cu/low-k interconnect for low power and high performance applications
FinCACTI: Architectural Analysis and Modeling of Caches with Deeply-Scaled FinFET Devices
Designing and simulation of full adder cell using FINFET technique
Compact Modeling Source-to-Drain Tunneling in Sub-10-nm GAA FinFET With Industry Standard Model
Analysis and Modeling of Threshold Voltage Mismatch for CMOS at 65 nm and Beyond
Simulation Study of a New Body-Tied FinFETs (Omega MOSFETs) Using Bulk Si Wafers
Communication-Efficient Distributed Deep Metric Learning with Hybrid Synchronization
Phase Current Sensor and Short-Circuit Detection based on Rogowski Coils Integrated on Gate Driver for 1.2 kV SiC MOSFET Half-Bridge Module
Learning Hierarchical Semantic Image Manipulation through Structured Representations
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits
Understanding human-computer interaction for information systems design