Instruct: Given the title of a paper, retrieve paper titles that are cited by the given paper.
Query: 2T 2:1 MUX based 1 bit full adder design
A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design
Comparative study of full adder circuit with 32nm MOSFET, DG-FinFET and CNTFET
A high speed low noise CMOS dynamic full adder cell
Performance analysis of low-power 1-bit CMOS full adder cells
An improved memristor-CMOS XOR logic gate and a novel full adder
a novel current mode full adder based on majority function .
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System
CMOS Full-Adders for Energy-Efficient Arithmetic Applications
Synthesis of full-adder circuit using reversible logic
Memristor-based XOR gate for full adder
Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
Novel low power full adder cells in 180nm CMOS technology
Full Adder Circuits using Static Cmos Logic Style: A Review
new design methodologies for high - speed mixed - mode cmos full adder circuits .
Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies
High Speed Power Efficient Carry Select Adder Design
Design And Implementation Of 2 Bit Ternary ALU Slice
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter
Analysis and optimization of Active Power and Delay of 10T Full Adder using Power Gating Technique at 45 nm Technology
A High-Reliability, Low-Power Magnetic Full Adder
2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS
Many Paths to Equilibrium: GANs Do Not Need to Decrease a Divergence At Every Step
Respiratory Physiology in Pregnancy
Phonotactic language recognition based on DNN-HMM acoustic model
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits