@Test
	public void testDisassemblerMultipathInstructionConflict1() throws Exception {

		// instr at 24 is tail of nfctx but we need to add to program builder to register
		// instruction location for verification purpose only 
		programBuilder.addBytesFallthrough(24);

		programBuilder.addBytesBranchConditional(10, 20);
		programBuilder.addBytesBranchConditional(12, 30);
		programBuilder.addBytesReturn(14);

		programBuilder.addBytesFallthrough(20);
		programBuilder.addBytesFallthroughSetNoFlowContext(22, 2, 18);// overwrites instr bytes at 24
		programBuilder.addBytesBranch(26, 40);

		programBuilder.addBytesFallthrough(30);
		programBuilder.addBytesFallthroughSetNoFlowContext(32, 2, 18);
		programBuilder.addBytesBranch(36, 40);

		programBuilder.addBytesReturn(40);

		AddressSetView disAddrs = disassembler.disassemble(addr(24), null);
		assertEquals(addrset(range(24, 27), range(40, 41)), disAddrs);

		// clear instruction at 40 to allow flow from 36
		program.getListing().clearCodeUnits(addr(40), addr(40), true);

		disAddrs = disassembler.disassemble(addr(10), null);
		assertEquals(addrset(range(10, 15), range(20, 21), range(30, 37), range(40, 41)), disAddrs);

		verifyInstructionPresence(CollectionUtils.asSet(addr(22)));

		verifyErrorBookmark(addr(22), "conflicting instruction");

	}
+--10: breq 20
  |  12: breq 30 ---+
  |	14: ret        |
  |	               |
  +->	20: or         |
     22: nfctx 18,2 | 24: imm (forced conflict)
	 +--	26: bral 40    | 
	 |	               |
	 |	30: or   <-----+
	 |  32: nfctx 28,2   
	 |	36: bral 40 ---+
	 |	               |
	 +->40: ret  <-----+ (clear after first dis to allow flow from 36)
Ghidra/Test/IntegrationTest/src/test.slow/java/ghidra/program/disassemble/DisassemblerTest.java